All TestGroup publications are available through PORTO, the Open Repository of publications produced by the scientific community of Politecnico di Torino.
We are involved in several national and international collaborative research projects co-funded by the European Commission or by national research fundings.
We actively collaborate with international academic and industrial partners. Learn more about companies and research institutions collaborating with us.
Tools and downloads
As computer scientists we are highly committed to Open Source. Most of our developed code is released under Open Source licenses and is available on this website for free download.
TestGroup is one of the leading European research and development teams in the field of System Design, Testing and Reliability.
Researching into new challenging problems to deliver breakthrough solutions for testing, reliability and security of next generation electronic systems.
Understand the needs and requirements of future technologies.
Deliver superior technical capabilities.
Demonstrate increasing value.
Build reliable systems with reduced overhead.
Innovative solutions for hardware security.
Hardware reconfigurable systems for high-performance and safety critical systems.
Test solutions to deliver high-quality digital systems, with focus on memory technologies.
Stefano Di Carlo
Giuseppe Airò Farulla
Several people have contributed to build our group as it is today.
Without the support of strongly motivated MS / Ph.D. students and Post. Docs we would not have been able to achieve the results we reached over the years. Several of our former colleagues built an outstanding career either in other universities or top level enterprises. Read more
Paper on cross-layer multi-objective design space exploration accepted @ IEEE Transactions on Computer
We received today an very good news. After more than 1 year from its end, the FP7 Clereco project (http://www.clereco.eu) still produces results in the field of cross-layer reliability analysis.
A paper has been accepted for publication in an upcoming issue of IEEE Transactions on Computers proposing a cross-layer multi-objective design space exploration algorithm developed to help designers when building soft error resilient electronic systems.
We just got the good news that our paper “Trading-off reliability and performance in FPGA-based reconfigurable heterogeneous systems” has been accepted for an oral presentation at the 13th IEEE International Conference on Design & Technology of Integrated Systems in Nanoscale Era.
We are happy to announce that Testgroup in collaboration with LIRMM (Montpellier, FR) will organize a special session on “How Approximate Computing impacts Verification, Test and Reliability of Integrated Circuits” at the IEEE VLSI Test Symposium 2018 (VTS’18), Hyatt Hotel, San Francisco, CA (USA) on April 22-25, 2018.
New paper titled “Multi-faceted Microarchitecture Level Reliability Characterization for NVIDIA and AMD GPUs” accepted for publication at the IEEE VLSI Test Symposium 2018 (VTS’18), Hyatt Hotel, San Francisco, CA (USA) on April 22-25, 2018.
DAUIN PhD students at the end of their studies (XXXX cycle) will present and discuss their research activities.. The event is an opportunity to discover the PhD program in Computer and Control Engineering and to better understand the research activities carried on at DAUIN. It is open to everyone interested.
Alessandro Carelli, Ph.D. student at Politecnico di Torino will present today the results of a study of the effect of side-channel attacks on the SEcube(TM) platform. The presentation will be given at the 15th IEEE EAST-WEST DESIGN & TEST SYMPOSIUM (EWDTS-2017) in Novi Sad, Serbia.
Sakis Chatzidimitriou Ph.D. student at University of Athens under Prof. Dimitris Gizopoulos presented yesterday the CPUs fault injection study (on ARM Cortex-A9 CPU) between microarchitecture-level and RT-level result of a collaboration between University of Athens, Politecnico di Torino and Intel/Yogitech in CLERECO FP7 project.
I’m very proud to announce that yesterday my student Alessandro Vallero defended his Ph.D. thesis in front of a committee of five experts in his research field and was awarded the Ph.D. degree in Computer Engineering “cum laude”,
On May 30 Alessandro VALLERO will discuss his PhD thesis, titled ” Cross layer reliability estimation for digital systems”
The 22nd IEEE European Test Symposium will start in a few days in Limassol (Cyprus).
Testgroup will be there with two interesting presentations.