All TestGroup publications are available through PORTO, the Open Repository of publications produced by the scientific community of Politecnico di Torino.
We are involved in several national and international collaborative research projects co-funded by the European Commission or by national research fundings.
We actively collaborate with international academic and industrial partners. Learn more about companies and research institutions collaborating with us.
Tools and downloads
As computer scientists we are highly committed to Open Source. Most of our developed code is released under Open Source licenses and is available on this website for free download.
TestGroup is one of the leading European research and development teams in the field of System Design, Testing and Reliability.
Researching into new challenging problems to deliver breakthrough solutions for testing, reliability and security of next generation electronic systems.
Understand the needs and requirements of future technologies.
Deliver superior technical capabilities.
Demonstrate increasing value.
Build reliable systems with reduced overhead.
Innovative solutions for hardware security.
Hardware reconfigurable systems for high-performance and safety critical systems.
Test solutions to deliver high-quality digital systems, with focus on memory technologies.
Stefano Di Carlo
Giuseppe Airò Farulla
Several people have contributed to build our group as it is today.
Without the support of strongly motivated MS / Ph.D. students and Post. Docs we would not have been able to achieve the results we reached over the years. Several of our former colleagues built an outstanding career either in other universities or top level enterprises. Read more
TestGroup team is attending IOLTS 2018 in Platja D’Aro (Spain). Interesting technical discussions and presentations, lot of friends and colleagues, all organized in a beautiful landscape …
Our Assistant Professor Alessandro Savino is going to give a presentation on Friday, June 1 at the Third Workshop on Approximate Computing 2018 – AxC’18, one of the Fringe Workshops of the 23rd IEEE European Test Symposium 2018 (ETS’81).
Our Ph.D. student Alberto Carelli is going to give a presentation on “Securing bitstream integrity, confidentiality and authenticity in reconfigurable mobile heterogeneous systems” today at the IEEE International Conference on Automation, Quality and Testing, Robotics 2018 – AQTR’18
Some nice pictures of the hot topic session organized by Prof. Alberto Bosio (LIRMM – France) and Prof. Stefano Di Carlo (Politecnico di Torino) at the 36th IEEE VLSI Test Symposium (VTS 2018) Hayatt Centric Fisherman’s Wharf San Francisco, California USA.
Some nice pictures of the plenary panel organized by Prof. Sule Ozev (Arizona State University – USA) and Prof. Stefano Di Carlo (Politecnico di Torino) at the 36th IEEE VLSI Test Symposium (VTS 2018) Hayatt Centric Fisherman’s Wharf San Francisco, California USA.
Dr. Alessandro Vallero from TestGroup presented our latest study on “Multi-faceted Microarchitecture Level Reliability Characterization for NVIDIA and AMD GPUs” @ 2018 IEEE VLSI Test Symposium, San Francisco, CA, USA (April 22-25, 2018).
Paper on cross-layer multi-objective design space exploration accepted @ IEEE Transactions on Computer
We received today an very good news. After more than 1 year from its end, the FP7 Clereco project (http://www.clereco.eu) still produces results in the field of cross-layer reliability analysis.
A paper has been accepted for publication in an upcoming issue of IEEE Transactions on Computers proposing a cross-layer multi-objective design space exploration algorithm developed to help designers when building soft error resilient electronic systems.
We just got the good news that our paper “Trading-off reliability and performance in FPGA-based reconfigurable heterogeneous systems” has been accepted for an oral presentation at the 13th IEEE International Conference on Design & Technology of Integrated Systems in Nanoscale Era.
We are happy to announce that Testgroup in collaboration with LIRMM (Montpellier, FR) will organize a special session on “How Approximate Computing impacts Verification, Test and Reliability of Integrated Circuits” at the IEEE VLSI Test Symposium 2018 (VTS’18), Hyatt Hotel, San Francisco, CA (USA) on April 22-25, 2018.
New paper titled “Multi-faceted Microarchitecture Level Reliability Characterization for NVIDIA and AMD GPUs” accepted for publication at the IEEE VLSI Test Symposium 2018 (VTS’18), Hyatt Hotel, San Francisco, CA (USA) on April 22-25, 2018.