All TestGroup publications are available through PORTO, the Open Repository of publications produced by the scientific community of Politecnico di Torino.
We are involved in several national and international collaborative research projects co-funded by the European Commission or by national research fundings.
We actively collaborate with international academic and industrial partners. Learn more about companies and research institutions collaborating with us.
Tools and downloads
As computer scientists we are highly committed to Open Source. Most of our developed code is released under Open Source licenses and is available on this website for free download.
TestGroup is one of the leading European research and development teams in the field of System Design, Testing and Reliability.
Researching into new challenging problems to deliver breakthrough solutions for testing, reliability and security of next generation electronic systems.
Understand the needs and requirements of future technologies.
Deliver superior technical capabilities.
Demonstrate increasing value.
Build reliable systems with reduced overhead.
Innovative solutions for hardware security.
Hardware reconfigurable systems for high-performance and safety critical systems.
Test solutions to deliver high-quality digital systems, with focus on memory technologies.
Stefano Di Carlo
Giuseppe Airò Farulla
Several people have contributed to build our group as it is today.
Without the support of strongly motivated MS / Ph.D. students and Post. Docs we would not have been able to achieve the results we reached over the years. Several of our former colleagues built an outstanding career either in other universities or top level enterprises. Read more
On Wednesday December 14, at the second floor of the Department of Control and Computer Engineering (DAUIN), Ph.D. students at the end of their studies (XXIX cycle) had the chance to present and discuss their research activities. The event has been an opportunity to illustrate the Ph.D. program in Computer and Control Engineering and to disseminate the research activities carried on at DAUIN.
My student Alessandro Vallero presented his Ph.D. work on “Reliability analysis of future digital systems “.
The FP7-CLERECO project will present on Thursday (Nov. 24th, 2016) its latest results and tools in a special session on “Cross-layer Reliability Assessment” at the XXXI Design of Circuits and Integrated Systems Conference – DCIS’16 (Granada, Spain). If you plan to attend DCIS don’t miss the session.
This week my Ph.D. student Alessandro Vallero is attending ITC 2016 in Fort Worth Texas, TX to present our latest paper: Cross-Layer System Reliability Assessment Against Hardware Faults
Invited talk at PATMOS to present the latest results of the CLERECO project.
L’insegnamento, obbligatorio per tutti gli studenti, si propone un duplice obiettivo: da un lato, introdurre gli studenti alle problematiche legate all’informatica, sia dal punto di vista ‘culturale’, sia dal punto di vista ‘tecnologico’. Dall’altro lato, insegnare l’uso della programmazione di un elaboratore quale strumento per la soluzione di problemi reali. Lo studente deve acquisire due Read more about 12BHDLZ – Informatica[…]
From a collaboration between TestGroup (Politecnico di Torino), TU Delft, University of Siena and Istituto Superiore Mario Boella (ISMB), we have created SIERRA, a simulation environment for precisely evaluating the repair efficiency of an MRA considering different fault signatures and faulty memory configurations. Enjoy reading information about SIERRA our new published.
Accelerating Computer Vision through RealSense for the Next Wave of Computing. Interesting announcement from INTEL. Combined with Intel’s Existing Assets, Movidius Technology – for New Devices Like Drones, Robots, Virtual Reality Headsets and More – Positions Intel to Lead in Providing Computer Vision and Deep Learning Solutions from the Device to the Cloud … https://newsroom.intel.com/editorials/josh-walden-intel-editorial/
We are pleased to announce the launch of our brand new website! After two months of hard work and dedication, we are delighted to officially announce the launch on Sept 9, 2016.
STT-MRAM model for CACTI simulator