CLERECO

Cross-layer Early Reliability Evaluation for the Computing Continuum 

  • Duration: 2013-2016
  • Coordinator: Politecnico di Torino (Italy)
  • Partners: National and Kapodistrian University of Athens (Greece) Centre National de la Recherche Scientifique – Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier (France) Intel Corporation Iberia S.A. (Spain) Thales SA (France) Yogitech spa (Italy) ABB AS (Norway)
  • Funded by: European Community FP7 Call.
  • www:  http://www.clereco.eu

Advanced multifunctional computing systems realized in forthcoming technologies hold the promise of a significant increase of the computational capability that will offer end-users ever improving services and functionalities (e.g., next generation mobile devices, cloud services, etc.). However, the same path that is leading technologies toward these remarkable achievements is also making electronic devices increasingly unreliable posing a threat to our society that is depending on the computers and electronic devices in every aspect of human activities.

Reliability of electronic systems is therefore a key challenge for the whole information and communication technology and must be guaranteed without penalizing or slowing down the characteristics of the final products.

CLERECO research project recognizes early accurate reliability evaluation as one of the most important and challenging tasks toward this goal. Being able to precisely and early evaluate the reliability of a system means being able to carefully plan for specific countermeasures rather than resorting to worst-case approaches. CLERECO project will be fundamental in the development of scaled systems for more than a decade from present.

The proposed CLERECO framework for efficient reliability evaluation and therefore efficient exploitation of reliability oriented design approaches starting from early phases of the design process will enable circuit integration to continue at exponential rates and enable the design and manufacture of future systems for the computing continuum at a minimum cost (e.g., up to 50% less area, up to 50% less energy, etc.) contrary to existing worst-case-design solutions for reliability. The applications of such chips will play a major role in our society and can be seen through the prism of future computing systems ranging from avionics, automobile, smartphones, mobile systems, Personal Computers (PCs) and future servers utilized in the settings of Data Centers, Grid Computing, Cloud Computing and other types of HPC systems.

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