Are we going to automate ourselves out of jobs?

Some nice pictures of the plenary panel organized by Prof. Sule Ozev (Arizona State University – USA) and Prof. Stefano Di Carlo (Politecnico di Torino) at the 36th IEEE VLSI Test Symposium (VTS 2018) Hayatt Centric Fisherman’s Wharf San Francisco, California USA.

Siddharth GARG (NYU – USA), Yiorgos MAKRIS (University of Texas at Dallas – USA), Niveditha Sundaram (Intel – USA), Rahima K Mohammed (Intel – USA) stimulated an interesting discussion of the future of EDA engineers in the machine learning era.

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