Author: Stefano Di Carlo
Paper on cross-layer multi-objective design space exploration accepted @ IEEE Transactions on Computer
We received today an very good news. After more than 1 year from its end, the FP7 Clereco project (http://www.clereco.eu) still produces results in the field of cross-layer reliability analysis.
A paper has been accepted for publication in an upcoming issue of IEEE Transactions on Computers proposing a cross-layer multi-objective design space exploration algorithm developed to help designers when building soft error resilient electronic systems.
Special Session on Approximate Computing @ VTS 2018
We are happy to announce that Testgroup in collaboration with LIRMM (Montpellier, FR) will organize a special session on “How Approximate Computing impacts Verification, Test and Reliability of Integrated Circuits” at the IEEE VLSI Test Symposium 2018 (VTS’18), Hyatt Hotel, San Francisco, CA (USA) on April 22-25, 2018.
DAUIN Ph.D. Poster Day
DAUIN PhD students at the end of their studies (XXXX cycle) will present and discuss their research activities.. The event is an opportunity to discover the PhD program in Computer and Control Engineering and to better understand the research activities carried on at DAUIN. It is open to everyone interested.
CPUs fault injection study @ DSN, 2017
Sakis Chatzidimitriou Ph.D. student at University of Athens under Prof. Dimitris Gizopoulos presented yesterday the CPUs fault injection study (on ARM Cortex-A9 CPU) between microarchitecture-level and RT-level result of a collaboration between University of Athens, Politecnico di Torino and Intel/Yogitech in CLERECO FP7 project.